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ht9200a/ht9200b dtmf generators selection table function part no. operating voltage osc frequency interface package ht9200a 2v~5.5v 3.58mhz serial 8 dip/sop ht9200b 2v~5.5v 3.58mhz serial/parallel 14 sop block diagram rev. 1.50 1 april 29, 2013 features operating voltage: 2.0v~5.5v serial mode for the ht9200a serial/parallel mode for the ht9200b low standby current low total harmonic distortion 3.58mhz crystal or ceramic resonator ht9200a: 8-pin dip/sop package ht9200b: 14-pin sop package general description the ht9200a/b tone generators are designed for mcu interfaces. they can be instructed by a mcu to gener - ate 16 dual tones and 8 single tones from the dtmf pin. the ht9200a provides a serial mode whereas the ht9200b contains a selectable serial/parallel mode in - terface for various applications such as security sys - tems, home automation, remote control through telephone lines, communication systems, etc.

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pin assignment pad assignment pad coordinates unit: m pad no. xy pad no. xy 1 553.30 430.40 8 553.30 523.50 2 553.30 133.50 9 553.30 190.30 3 553.30 328.50 10 553.30 4.70 4 553.30 523.50 11 553.30 340.30 5 220.10 523.50 12 374.90 523.50 6 25.10 523.50 13 279.30 523.50 7 308.10 523.50 chip size: 1460 1470 ( m) 2 * the ic substrate should be connected to vss in the pcb layout artwork. pin description pin name i/o internal connection description ce i cmos in pull-high chip enable, active low x2 o oscillator the system oscillator consists of an inverter, a bias resistor, and the required load capacitor on chip. the oscillator function can be implemented by connect a standard 3.579545mhz crystal to the x1 and x2 terminals. x1 i vss negative power suppl, ground nc no connection d0~d3 i cmos in pull-high or floating data inputs for the parallel mode when the ic is operating in the serial mode, the data input terminals (d0~d3) are included with a pull-high resistor. when the ic is operating in the parallel mode, these pins become floating. s /p i cmos in operation mode selection input s /p=h : parallel mode s /p=l : serial mode clk i cmos in pull-high or floating data synchronous clock input for the serial mode when the ic is operating in the parallel mode, the input terminal (clk) is included with a pull-high resistor. when the ic is operating in the serial mode, this pin be - comes floating. ht9200a/ht9200b rev. 1.50 2 april 29, 2013 ( # $ * # ) + # # # $ , # - . ) / ) 0 " $ " # 1 # $ ) & ' % % 1 ( ( # $ + - , " $ " # 1 1 % % & '
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pin name i/o internal connection description data i cmos in pull-high or floating data input terminal for the serial mode when the ic is operating in the parallel mode, the input terminal (data) is included with a pull-high resistor. when the ic is operating in the serial mode, this pin be - comes floating. dtmf o cmos out output terminal of the dtmf signal vdd positive power supply, 2.0v~5.5v for normal operation approximate internal connection circuits absolute maximum ratings supply voltage ............................................ 0.3v to 6v storage temperature ............................ 50 cto125 c input voltage ................................v ss 0.3 to v dd +0.3v operating temperature........................... 20 cto75 c note: these are stress ratings only. stresses exceeding the range specified under absolute maximum ratings may cause substantial damage to the device. functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliabil - ity. ht9200a/ht9200b rev. 1.50 3 april 29, 2013 3 2

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electrical characteristics ta=25 c symbol parameter test conditions min. typ. max. unit v dd conditions v dd operating voltage 2 5.5 v i dd operating current 2.5v s /p=v dd ,d0~d3=v ss , ce =v ss , no load 240 2500 a 5.0v 950 3000 v il low input voltage vss 0.2v dd v v ih high input voltage 0.8v dd v dd v i stb standby current 2.5v s /p=v dd ,ce =v dd , no load 1 a 5.0v 2 r p pull-high resistance 2.5v v ol =0v 120 180 270 k 5.0v 45 68 100 t de dtmf output delay time (parallel mode) 5v t up +6 t up +8 ms v tdc dtmf output dc level 2v~ 5.5v dtmf output 0.45v dd 0.75v dd v i tol dtmf sink current 2.5v v dtmf =0.5v 0.1 ma v tac dtmf output ac level 2.5v row group, r l =5k 0.12 0.15 0.18 vrms a cr column pre-emphasis 2.5v row group=0db 1 2 3 db r l dtmf output load 2.5v t hd
23db 5 k t hd tone signal distortion 2.5v r l =5k 30 23 db f clk clock input rate (serial mode) 100 500 khz t up oscillator starting time (when ce is low) 5.0v the time from ce falling edge to normal oscillator operation 10 ms f osc system frequency crystal=3.5795mhz 3.5759 3.5795 3.5831 mhz ht9200a/ht9200b rev. 1.50 4 april 29, 2013
table 1: digits vs. input data vs. tone output frequency (serial mode) digit d4 d3 d2 d1 d0 tone output frequency (hz) 100001 6971209 200010 6971336 300011 6971477 400100 7701209 500101 7701336 600110 7701477 700111 8521209 801000 8521336 901001 8521477 001010 9411336 01011 9411209 01100 9411477 a01101 6971633 b01110 7701633 c01111 8521633 d00000 9411633 10000 6 9 7 10001 7 7 0 10010 8 5 2 10011 9 4 1 10100 1209 10101 1336 10110 1477 10111 1633 dtmf off 11111 note: the codes not listed in table 1 are not used d4 is msb ht9200a/ht9200b rev. 1.50 5 april 29, 2013 functional description the ht9200a/b are dtmf generators for mcu inter - faces. they are controlled by a mcu in the serial mode or the parallel mode (for the ht9200b only). serial mode (ht9200a/b) the ht9200a/b employ a data input, a 5-bit code, and a synchronous clock to transmit a dtmf signal. every digit of a phone number to be transmitted is selected by a series of inputs which consist of 5-bit data. of the 5 bits, the d0(lsb) is the first received bit. the ht9200a/b will latch data on the falling edge of the clock (clk pin). the relationship between the digital codes and the tone output frequency is shown in table 1. as for the control timing diagram, refer to figure 1. when the system is operating in the serial mode a pull-high resistor is attached to d0~d3 (for parallel mode) on the input terminal.
table 2: digits vs. input data vs. tone output frequency (parallel mode) digit d3 d2 d1 d0 tone output frequency (hz) 10001 6971209 20010 6971336 30011 6971477 40100 7701209 50101 7701336 60110 7701477 70111 8521209 81000 8521336 91001 8521477 01010 9411336 1011 9411209 1100 9411477 a1101 6971633 b1110 7701633 c1111 8521633 d0000 9411633 ht9200a/ht9200b rev. 1.50 6 april 29, 2013 for the ht9200b, the s /p pin has to be connected low for serial mode operation. parallel mode ( ht9200b) the ht9200b provides four data inputs d0~d3 to gener - ate their corresponding dtmf signals. the s /p has to be connected high to select the parallel operation mode. then the input data codes should be determined. finally, the ce is connected low to transmit the dtmf signal from the dtmf pin. the t de time (about 6ms) will be delayed from the ce fall - ing edge to the dtmf signal output. the relationship between the digital codes and the tone output frequency is illustrated in table 2. as for the control timing diagram, see figure 2. when the system is operating in the parallel mode, d0~d3 are all in the floating state. thus, these data in - put pins should not float. ( " $ % % & ' & 8 8 & 8 8 & 8 8 # # # # # 6 # 6 $ 6 # 6
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tone frequency output frequency (hz) %error specified actual 697 699 +0.29% 770 766 -0.52% 852 847 -0.59% 941 948 +0.74% 1209 1215 +0.50% 1336 1332 -0.30% 1477 1472 -0.34% 1633 1645 +0.74% % error does not contain the crystal frequency drift ht9200a/ht9200b rev. 1.50 7 april 29, 2013

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application circuits serial mode serial/parallel mode ht9200a/ht9200b rev. 1.50 8 april 29, 2013 # + # # $ # # # ) * # $ + , - ( " $ " # 1 2 ) # 1 % % & ' $ - * + 1 ( ) # $ & ' % % 1 1 1 $ ) $ ) 1 1 % % & ' # $ + - , ( " $ " # 1 - * + 1 1 1 1 ( & ' % % $ ) $ )
package information ht9200a/ht9200b rev. 1.50 9 april 29, 2013 note that the package information prov ided here is for consultation purposes only. as this information may be updated at regular intervals users are reminded to consult the holtek website for the latest version of the package/carton information . additional supplementary information with regard to packaging is listed below . click on the relevant section to be transferred to the relevant website page. ? further package inform ation (include ou tline dimensions, produc t tape and reel specifications) ? packing meterials information ? carton information
8-pin dip (300mil) outline dimensions symbol dimensions in inch min. nom. max. a 0.355 0.375 b 0.240 0.260 c 0.125 0.135 d 0.125 0.145 e 0.016 0.020 f 0.050 0.070 g 0.100 h 0.295 0.315 i 0.375 symbol dimensions in mm min. nom. max. a 9.02 9.53 b 6.10 6.60 c 3.18 3.43 d 3.18 3.68 e 0.41 0.51 f 1.27 1.78 g 2.54 h 7.49 8.00 i 9.53 ht9200a/ht9200b rev. 1.50 10 april 29, 2013 + # % 8 ( !
8-pin sop (150mil) outline dimensions ms-012 symbol dimensions in inch min. nom. max. a 0.228 0.244 b 0.150 0.157 c 0.012 0.020 c 0.188 0.197 d 0.069 e 0.050 f 0.004 0.010 g 0.016 0.050 h 0.007 0.010 08 symbol dimensions in mm min. nom. max. a 5.79 6.20 b 3.81 3.99 c 0.30 0.51 c 4.78 5.00 d 1.75 e 1.27 f 0.10 0.25 g 0.41 1.27 h 0.18 0.25 08 ht9200a/ht9200b rev. 1.50 11 april 29, 2013 ? ! ( # % 8 +
14-pin sop (150mil) outline dimensions ms-012 symbol dimensions in inch min. nom. max. a 0.228 0.244 b 0.150 0.157 c 0.012 0.020 c 0.337 0.344 d 0.069 e 0.050 f 0.004 0.010 g 0.016 0.050 h 0.007 0.010 08 symbol dimensions in mm min. nom. max. a 5.79 6.20 b 3.81 3.99 c 0.30 0.51 c 8.56 8.74 d 1.75 e 1.27 f 0.10 0.25 g 0.41 1.27 h 0.18 0.25 08 ht9200a/ht9200b rev. 1.50 12 april 29, 2013 # + # - % 8 ( ! ?
ht9200a/ht9200b rev. 1.50 13 april 29, 2013 copyright 2013 by holtek semiconductor inc. the information appearing in this data sheet is believed to be accurate at the time of publication. however, holtek assumes no responsibility arising from the use of the specifications described. the applications mentioned herein are used solely for the purpose of illustration and holtek makes no warranty or representation that such applications will be suitable without further modi - fication, nor recommends the use of its products for application that may present a risk to human life due to malfunction or otherwise. holtek s products are not authorized for use as critical com - ponents in life support devices or systems. holtek reserves the right to alter its products without prior notification. for the most up-to-date information, please visit our web site at http://www.holtek.com.tw.

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